80x86 IBM PC及兼容计算机卷I和卷II—汇编语言，设计与接口技术（第3版） (2008 年度畅销榜NO.43616 )

由于PC机的大量应用，有关PC机软、硬件设计的基础知识在大专院校广为传授。本书可作为有关专业课程的教科书。全面内容涵盖了从8088到Pentium Pro全部*86微处理机。作者系统全面地介绍了微机的软、硬件设计。全书包括两大部分：1）泯编语言程序设计；2）IBM PC机接口设计。在介绍汇编语言程序的章节中，以编程方法为引导，逐步加入各种语句及指令，有很多实例，又结合程序调试方法，与PC机的BIOS及DOS编辑结合得好。在接口设计方面，从PC机应用的芯片到设备，从电路设计到编程都进行了详细的阐述。在一些应用举例中，与PC机本身资源结合得好。书中专有一章讨论ISA，PCI和USB总线。全书实例、解答题丰富，有利于读者深入理解。本书附带软盘一张。 \r\n

PREFACE TO THE SERIES \r\nPREFACE TO VOLUMES I AND II \r\n\r\nCHAPTER 0: INTRODUCTION TO COMPUTING \r\n\r\nSECTION 0.1: NUMBERING AND CODING SYSTEMS\r\nSECTION 0.2: INSIDE THE COMPUTER \r\nSECTION 0.3: BRIEF HISTORY OF THE CPU \r\n\r\nCHAPTER 1: THE 80x86 MICROPROCESSOR\r\n\r\nSECTION 1.1: BRIEF HISTORY OF THE 80x86 FAMILY \r\nSECTION 1.2: INSIDE THE 8088/8086\r\nSECTION 1.3: INTRODUCTION TO ASSEMBLY PROGRAMMING \r\nSECTION 1.4: INTRODUCTION TO PROGRAM SEGMENTS \r\nSECTION 1.5: MORE ABOUT SEGMENTS IN THE 80x86 \r\nSECTION 1.6: 80x86 ADDRESSING MODES\r\n\r\nCHAPTER 2: ASSEMBLY LANGUAGE PROGRAMMING \r\n\r\nSECTION 2.1: DIRECTIVES AND A SAMPLE PROGRAM \r\nSECTION 2.2: ASSEMBLE, UNK, AND RUN A PROGRAM \r\nSECTION 2.3: MORE SAMPLE PROGRAMS \r\nSECTION 2.4: CONTROL TRANSFER INSTRUCTIONS \r\nSECTION 2.5: DATA TYPES AND DATA DEFINITION \r\nSECTION 2.6: FULL SEGMENT DEFINITION \r\nSECTION 2.7: EXE VS. COM FILES \r\n\r\nCHAPTER 3: ARITHMETIC AND LOGIC INSTRUCTIONS AND PROGRAMS \r\n\r\nSECTION 3.1: UNSIGNED ADDITION AND SUBTRACTION \r\nSECTION 3.2: UNSIGNED MULTIPLICATION AND DIWSION \r\nSECTION 3.3: LOGIC INSTRUCTIONS AND SAMPLE PROGRAMS \r\nSECTION 3.4: BCD AND ASCII OPERANDS AND INSTRUCTIONS \r\nSECTION 3.5: ROTATE INSTRUCTIONS \r\nSECTION 3.6: BITWISE OPERATION IN THE C LANGUAGE \r\n\r\nCHAPTER 4: BIOS AND DOS PROGRAMMING IN ASSEMBLY AND C \r\n\r\nSECTION 4.1: BIOS INT 10H PROGRAMMING \r\nSECTION 4.2: DOS INTERRUPT 21H \r\nSECTION 4.3: INT 16H KEYBOARD PROGRAMMING \r\nSECTION 4.4: INTERRUPT PROGRAMMING WITH C \r\n\r\nCHAPTER 5: MACROS AND THE MOUSE \r\n\r\nSECTION 5.1: WHAT IS A MACRO AND HOW IS IT USED? \r\nSECTION 5.2: MOUSE PROGRAMMING WITH INTERRUPT 33H \r\n\r\nCHAPTER 6: SIGNED NUMBERS, STRINGS, AND TABLES \r\n\r\nSECTION 6.1: SIGNED NUMBER ARITHMETIC OPERATIONS \r\nSECTION 6.2: STRING AND TABLE OPERATIONS \r\n\r\nCHAPTER 7: MODULES; MODULAR AND C PROGRAMMING \r\n\r\nSECTION 7.1: WRITING AND UNKING MODULES \r\nSECTION 7.2: SOME VERY USEFUL MODULES \r\nSECTION 7.3: PASSING PARAMETERS AMONG MODULES \r\nSECTION 7.4: COMBINING ASSEMBLY LANGUAGE AND C PROGRAMS \r\n\r\nCHAPTER 8: 32-BIT PROGRAMMING FOR 386 AND 486 MACHINES \r\n\r\nSECTION 8.1: 803B6/80486 MACHINES IN REAL MODE \r\nSECTION 8.2: SOME SIMPLE 38/486 PROGRAMS \r\nSECTION 8.3: 80x86 PERFORMANCE COMPARISON \r\n\r\nCHAPTER 9: 8088/86 MICROPROCESSORS AND SUPPORTING CHIPS \r\n\r\nSECTION 9.1: OVERVIEW OF INTELS 80X86 MICROPROCESSORS \r\nSECTION 9.2: 8088/8086 MICROPROCESSOR \r\nSECTION 9.3: 8284 CLOCK GENERATOR AND DRIVER \r\nSECTION 9.4: 8288 BUS CONTROLLER \r\nSECTION 9.5: IBM PCIXT BUSES \r\n\r\nCHAPTER 10: 80286 MICROPROCESSOR AND SUPPORTING CHIPS\r\n\r\nSECTION 10.1: 80286 MICROPROCESSOR \r\nSECTION 10.2: 822B4 CLOCK GENERATOR \r\nSECTION 10.3: 82288 BUS CONTROLLER \r\nSECTION 10.4: 80286 IN IBM PC AT AND ISA BUSES \r\n\r\nCHAPTER 11: MEMORY AND MEMORY INTERFACING \r\n\r\nSECTION 11.1: SEMICONDUCTOR MEMORY FUNDAMENTALS \r\nSECTION 11.2: IBM PC MEMORY MAP \r\nSECTION 11.3: MEMORY INTERFACING IN 8088 IBM PCIXT \r\nSECTION 11.4: 8088/86 READ AND WRITE CYCLE TIME SPECIFICATIONS \r\nSECTION 11.5: 80286/386SX MEMORY INTERFACING AND TIMING \r\nSECTION 11.6: MEMORY BUS BANDWIDTH FOR 80x86 COMPUTERS\r\n\r\nCHAPTER 12: I/O, 8255 AND DEVICE INTERFACING \r\n\r\nSECTION 12.1: INPUT/OUTPUT INSTRUCTIONS IN THE 808S/86 \r\nSECTION 12.2: IIO DESIGN IN THE 808/86 \r\nSECTION 12.3: 8255 PROGRAMMABLE PERIPHERAL INTERFACING\r\nSECTION 12.4: IBM PC, PS I/O MAP \r\nSECTION 12.5: 80286 AT COMPUTERS AND ISA BUS IIO PORTS \r\nSECTION 12.6: INTERFACING I/O TO PCIXT AT PS, AND ISA COMPUTERS \r\nSECTION 12.7: PC INTERFACE TRAINER AND PC BUS EXTENDER \r\nSECTION 12.8: INTERFACING AN LCD TO THE PC\r\nSECTION 12.9: INTERFACING A STEPPER MOTOR TO A PC \r\nSECTION 12.10: INTERFACING DAC TO A PC \r\nSECTION 12.11: INTERFACING ADC AND SENSORS TO A PC \r\nSECTION 12.12: I/O PROGRAMMING WITH C \r\n\r\nCHAPTER 13: 82S3/54 TIMER AND MUSIC \r\n\r\nSECTION 13.1: 8253/54 TIMER DESCRIPTION AND INITIALIZADON \r\nSECTION 13.2: IBM PC 8253/54 TIMER CONNECTIONS AND PROGRAMMING \r\nSECTION 13.3: GENERATING MUSIC ON THE IBM PC \r\nSECTION 13.4: SHAPE Of 8253/54 OUTPUTS \r\n\r\nCHAPTER 14: INTERRUPTS AND THE 8259 CHIP \r\n\r\nSECTION 14.1: 8088/86 INTERRUPTS \r\nSECTION 14.2: IBM PC AND MS DOS ASSIGNMENT OF INTERRUPTS \r\nSECTION 14.3: 8259 PROGRAMMABLE INTERRUPT CONTROLLER \r\nSECTION 14.4: USE OF THE 8259 CHIP IN THE ISM PC/XT \r\nSECTION 14.5: INTERRUPTS ON 80286 AND HIGHER 80X86 PCs \r\n\r\nCHAPTER 15: DIRECT MEMORY ACCESSING; THE 8237 DMA CHIP\r\n\r\nSECTION 15.2: 8237 DMA CHIP PROGRAMMING \r\nSECTION 15.3: 8237 DMA INTERFACING IN THE IBM PC/XT \r\nSECTION 15.4: REFRESHING DRAM USING CHANNEL 0 OF THE 8237 \r\nSECTION 15.5: DMA IN 80x86-BASED PC ATTYPE COMPUTERS \r\n\r\nCHAPTER 16: VIDEO AND VIDEO ADAPTERS \r\n\r\nSECTION 16.1: PRINCIPLES OF MONITORS AND VIDEO ADAPTERS \r\nSECTION 16.2: VIDEO ADAPTERS AND TEXT MODE PROGRAMMING \r\nSECTION 16.3: TEXT MODE PROGRAMMING USING INT 10H \r\nSECTION 16.4: GRAPHICS AND GRAPHICS PROGRAMMING \r\n\r\nCHAPTER 17: SERIAL DATA COMMUNICATION AND THE 16450/8250/51 CHIPS \r\n\r\nSECTION 17.1: BASICS OF SERIAL COMMUNICATION \r\nSECTION 17.2: ACCESSING I8M PC COM PORTS USING DOS AND BIOS \r\nSECTION 17.3: INTERFACING THE NS8250l1 6450 UART IN THE IBM PC \r\nSECTION 17.4: INTEL 8251 USART AND SYNCHRONOUS COMMUNICATION \r\n\r\nCHAPTER 18: KEYBOARD AND PRINTER INTERFACING \r\n\r\nSECTION 18.1: INTERFACING THE KEYBOARD TO THE CPU \r\nSECTION 18.2: PC KEYBOARD INTERFACING AND PROGRAMMING \r\nSECTION 18.3: PRINTER AND PRINTER INTERFACING IN THE IBM PC \r\nSECTION 18.4: BIDIRECTIONAL DATA BUS IN PARALLEL PORTS \r\n\r\nCHAPTER 19: FLOPPY DISKS, HARD DISKS, AND FILES \r\n\r\nSECTION 19.1: FLOPPY DISK ORGANIZTION \r\nSECTION 19.2: HARD DISKS \r\nSECTION 19.3: DISK FILE PROGRAMMING \r\n\r\nCHAPTER 20: THE 80x87 MATH COPROCESSOR \r\n\r\nSECTION 20.1: MATH COPROCESSOR AND IEEE FLOADNG-POINT STANDARDS \r\nSECTION 20.2: 80x87 INSTRUCTIONS AND PROGRAMMING \r\nSECTION 20.3: 8087 HARDWARE CONNECTIONS IN THE IBM PC/XT \r\nSECTION 20.4: 80x87 INSTRUCTIONS AND TMING \r\n\r\nCHAPTER 21: 386 MICROPROCESSOR: REAL vs. PROTECTED MODE \r\n\r\nSECTION 21.1: 80386 IN REAL MODE \r\nSECTION 21.2: 80386: A HARDWARE VIEW \r\nSECTION 21.3: 80386 PROTECTED MODE \r\n\r\nCHAPTER 22: HIGH-SPEED MEMORY INTERFACING AND CACHE \r\n\r\nSECTION 22.1: MEMORY CYCLE TIME OF THE 80X86 \r\nSECTION 22.2: PAGE, STATIC COLUMN, AND NIBBLE MODE DRAMS \r\nSECTION 22.3: CACHE MEMORY \r\nSECTION 22.4: EDO, SDRAM, AND RAMBUS MEMORIES \r\n\r\nCHAPTER 23: 486, PENTIUM, PENTIUM PRO AND MMX \r\n\r\nSECTION 23.1: THE 80486 MICROPROCESSOR \r\nSECTION 23.2: INTELS PENTIUM \r\nSECTION 23.3: RISC ARCHITECTURE \r\nSECTION 23.4: PENTIUM PRO PROCESSOR \r\nSECTION 23.5: MMX TECHNOLOGY \r\nSECTION 23.6: PROCESSOR IDENTIFICATION IN INTEL X86 \r\n\r\nCHAPTER 24: MS DOS STRUCTURE, TSR, AND DEVICE DRIVERS \r\n\r\nSECTION 24.1: MS DOS STRUCTURE \r\nSECTION 24.2: TSR AND DEVICE DRIVERS \r\n\r\nCHAPTER 25: MS DOS MEMORY MANAGEMENT \r\n\r\nSECTION 25.1: 80x86 PC MEMORY TERMINOLOGY AND CONCEPTS \r\nSECTION 25.2: DOS MEMORY MANAGEMENT AND LOADING HIGH \r\n\r\nCHAPTER 26: IC TECHNOLOGY AND SYSTEM DESIGN CONSIDERATIONS \r\n\r\nSECTION 26.1: OVERVIEW OF IC TECHNOLOGY \r\nSECTION 26.2: IC INTERFACING AND SYSTEM DESIGN CONSIDERATIONS \r\nSECTION 26.3: DATA INTEGRITY AND ERROR DETECTION IN DRAM \r\n\r\nCHAPTER 27: ISA, PCI, AND USB BUSES \r\n\r\nSECTION 27.1: ISA BUSES \r\nSECTION 27.2: PCI LOCAL BUSES \r\nSECTION 27.3: USB PORT \r\n\r\nCHAPTER 28: PROGRAMMING DOS, BIOS, & HARDWARE WITH C/C++ \r\n\r\nSECTION 28.1: BIOS & DOS INTERRUPT PROGRAMMING WITH C \r\nSECTION 28.2: PROGRAMMING PC HARDWARE WITH C/C++ \r\n\r\nAPPENOIX A: DEBUG PROGRAMMING \r\nAPPENOIX B: 80x86 INSTRUCTIONS AND TIMING \r\nAPPENDIX C: ASSEMBLER DIRECTIVES AND NAMING RULES \r\nAPPENDIX D: DOS INTERRUPT 21H AND 33H LISTING \r\nAPPENOIX E: BIOS INTERRUPTS \r\nAPPENDIX F: ASCII CODES \r\nAPPENDIX G: IIO ADDRESS MAPS \r\nAPPENDIX H: ISM PCIPS BIOS DATA AREA \r\nAPPENDIX I: DATA SHEETS \r\n\r\nREFERENCES \r\nINDEX