数字电子学（英文版·原书第4版） (2010 年度畅销榜NO.24501 )

本书是一本数字电子学的基础教材，内容涵盖了数字原理、数字技术和相关硬件，以简明易懂的方式讲述了从基本数字概念到微处理器和微控制器的全部知识，还包括了动手实验和应用Electronics Workbench软件的计算机仿真实验，特别适合计算机、电子信息与自动化等专业的一学期课程使用。本书有以下特点：\r\n\r\n ●简明易懂 以清楚、易理解的词汇引出数字概念的基础知识。\r\n\r\n ●动手实验和计算机仿真实验每章末都有应用传统设备和Electronics Workbench软件的实验，提供了解决实际问题的例子。\r\n\r\n ●综合介绍可编程逻辑器件 每章末都介绍了如何应用PLD实现该章内介绍的各种数字电路。\r\n\r\n ●联系实际 通过提示、工业设计电路等举例说明刚刚学到的概念是如何运用到实际当中的。\r\n\r\n ●重点强调解决实际问题 每章中部有解决实际问题的小节，分析问题并介绍解决问题的过程和\r\n\r\n 方法，使读者掌握这项重要技能。\r\n\r\n ●强大的教学途径 通过“目标”、“关键术语”、“例题”、“自测题”、“小结”、“问答题与习题”、“实验”和“词汇表”等，使读者能够明确学习目标，进行充分的练习和复习，达到知识巩固。\r\n\r\n ●内容最新 书中介绍的PLD、GAL、Intel、Motorola器件，以及微处理器都是当前工业领域 中的最新型号产品。\r\n
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出版说明 iv \r\n\r\n 序 v \r\n\r\n Preface xi \r\n\r\n 1 NUMBER SYSTEMS \r\n\r\n 1.1 Binary Number System 3 \r\n\r\n 1.2 Binary to Decimal Conversion 4 \r\n\r\n 1.3 Decimal to Binary Conversion 6 \r\n\r\n 1.4 Octal Number System 9 \r\n\r\n 1.5 Binary to Octal Conversion 11 \r\n\r\n 1.6 Octal to Binary Conversion 12 \r\n\r\n 1.7 Hexadecimal Number System 13 \r\n\r\n 1.8 Binary to Hexadecimal Conversion 14 \r\n\r\n 1.9 Hexadecimal to Binary Conversion 15 \r\n\r\n 1.10 Binary-Coded Decimal (BCD) 16 \r\n\r\n 1.11 Binary Addition 20 \r\n\r\n 1.12 Binary Subtraction 22 \r\n\r\n 1.13 Troubleshooting a 4-Bit Adder 24 \r\n\r\n Digital Application 26 \r\n\r\n Summary 27 \r\n\r\n Questions and Problems 28 \r\n\r\n Lab 1A 7483 4-Bit FullAdder 30 \r\n\r\n Lab 1B 4008 4-Bit Full Adder 36 \r\n\r\n 2 LOGIC GATES 41 \r\n\r\n 2.1 Gates 43 \r\n\r\n 2.2 Inverters 43 \r\n\r\n 2.3 OR Gates 45 \r\n\r\n 2.4 AND Gates 50 \r\n\r\n 2.5 NAND Gates 55 \r\n\r\n 2.6 NOR Gates 59 \r\n\r\n 2.7 Data Control Enable/Inhibit 63 \r\n\r\n 2.8 AND Gate Enable/Inhibit 63 \r\n\r\n 2.9 NAND Gate Enable/Inhibit 64 \r\n\r\n 2.10 OR Gate Enable/Inhibit 65 \r\n\r\n 2.11 NOR Gate Enable/Inhibit 66 \r\n\r\n 2.12 Summary Enable/Inhibit 67 \r\n\r\n 2.13 NAND as an Inverter 68 \r\n\r\n 2.14 NOR as an Inverter 68 \r\n\r\n 2.15 Expanding an AND Gate 68 \r\n\r\n 2.16 Expanding a NAND Gate 69 \r\n\r\n 2.17 Expanding an OR Gate 69 \r\n\r\n 2.18 Expanding a NOR Gate 69 \r\n\r\n 2.19 Troubleshooting Gates 70 \r\n\r\n Digital Application 71 \r\n\r\n Summary 72 \r\n\r\n Questions and Problems 74 \r\n\r\n Lab2A Gates 78 \r\n\r\n Lab2B Gates 82 \r\n\r\n 3 WAVEFORMS AND BOOLEAN ALGEBRA 85 \r\n\r\n 3.1 Waveform Analysis 87 \r\n\r\n 3.2 Delayed-Clock and Shift-Counter Wave forms 90 \r\n\r\n 3.3 Combinational Logic 98 \r\n\r\n 3.4 Boolean Theorems 100 \r\n\r\n 3.5 DeMorgan's Theorems 107 \r\n\r\n 3.6 Designing Logic Circuits 112 \r\n\r\n 3.7 AND-OR-Invert Gates 123 \r\n\r\n 3.8 Reducing Boolean Expressions Using Karnaugh Maps 126 \r\n\r\n 3.9 Programmable Logic Devices 128 \r\n\r\n 3.10 Troubleshooting Combinational Logic Circuits 132 \r\n\r\n Digital Application 134 \r\n\r\n Summary 135 \r\n\r\n Questions and Problems 137 \r\n\r\n Lab 3A Boolean Algebra 146 \r\n\r\n Lab 3B Logic Converter 150 \r\n\r\n 4 EXCLUSIVE-OR GATES 153 \r\n\r\n 4.1 Exclusive-OR 155 \r\n\r\n 4.2 Enable/Inhibit 158 \r\n\r\n 4.3 Waveform Analysis 159 \r\n\r\n 4.4 Exclusive-NOR 160 \r\n\r\n 4.5 Parity 162 \r\n\r\n 4.6 Even-Parity Generator 164 \r\n\r\n 4.7 Even/Odd-Parity Generator 166 \r\n\r\n 4.8 Parity Checker 168 \r\n\r\n 4.9 9-Bit Parity Generator/Checker 170 \r\n\r\n 4.10 Comparator 175 \r\n\r\n 4.11 Programmable Logic Devices 181 \r\n\r\n 4.12 Troubleshooting Exclusive-OR Circuits 193 \r\n\r\n Digital Application 194 \r\n\r\n Summary 195 \r\n\r\n Questions and Problems 196 \r\n\r\n Lab 4A Exclusive-Or 200 \r\n\r\n Lab 4B Parity Generator/Checker 202 \r\n\r\n 5 ADDERS 205 \r\n\r\n 5.1 Half Adder 207 \r\n\r\n 5.2 Full Adder 208 \r\n\r\n 5.3 Binary l's Complement Subtraction 216 \r\n\r\n 5.4 1 's Complement Adder/Subtractor Circuit 218 \r\n\r\n 5.5 Binary 2's Complement Subtraction 223 \r\n\r\n 5.6 2's Complement Adder/Subtractor Circuit 226 \r\n\r\n 5.7 Signed 2's Complement Numbers 232 \r\n\r\n 5.8 Binary-Coded-Decimal Addition 238 \r\n\r\n 5.9 Binary-Coded-Decimal Adder Circuit 240 \r\n\r\n 5.10 Arithmetic Logic Unit (ALU) 243 \r\n\r\n 5.11 Programming a GAL 245 \r\n\r\n 5.12 Troubleshooting Adder Circuits 252 \r\n\r\n Digital Application 254 \r\n\r\n Summary 254 \r\n\r\n Questions and Problems 256 \r\n\r\n Lab 5A Adders 260 \r\n\r\n Lab 5B Adder Circuits 262 \r\n\r\n 6 SPECIFICATIONS AND OPEN-COLLECTOR GATES 265 \r\n\r\n 6.1 TTL Subfamilies 267 \r\n\r\n 6.2 TTL Electrical Characteristics 267 \r\n\r\n 6.3 TTL Supply Currents 273 \r\n\r\n 6.4 TTL Switching Characteristics 274 \r\n\r\n 6.5 TTL Open-Collector Gates 278 \r\n\r\n 6.6 Open-Collector Applications 280 \r\n\r\n 6.7 CMOS 282 \r\n\r\n 6.8 CMOS Subfamilies 282 \r\n\r\n 6.9 CMOS Specifications 285 \r\n\r\n 6.10 Interfacing TTL to CMOS 288 \r\n\r\n 6.11 Low Voltage CMOS 291 \r\n\r\n 6.12 Emitter Coupled Logic (ECL) 293 \r\n\r\n 6.13 Interfacing ECL to Other Logic Families 295 \r\n\r\n 6.14 Surface Mount Technology 296 \r\n\r\n 6.15 GAL Specifications 298 \r\n\r\n 6.16 Troubleshooting TTL and CMOS Devices 299 \r\n\r\n Digital Application 300 \r\n\r\n Summary 302 \r\n\r\n Questions and Problems 302 \r\n\r\n Lab 6A Specifications and OpenCollector Gates 304 \r\n\r\n Lab 6B Specifications and Open-Drain Inverters 307 \r\n\r\n 7 FLIP-FLOPS 309 \r\n\r\n 7.1 Introduction to Flip-Flops 311 \r\n\r\n 7.2 Crossed NAND SET-RESET Flip-Flops 311 \r\n\r\n 7.3 Crossed NOR SET-RESET Flip-Flops 313 \r\n\r\n 7.4 Comparison of the Crossed NAND and the Crossed NOR SET-RESET Flip-Flops 315 \r\n\r\n 7.5 Using a SET-RESET Flip-Flop as a Debounce Switch 316 \r\n\r\n 7.6 The Gated SET-RESET Flip-Flop 317 \r\n\r\n 7.7 The Transparent D Flip-Flop 319 \r\n\r\n 7.8 The Master-Slave D Flip-Flop 322 \r\n\r\n 7.9 The Pulse Edge-Triggered D Flip-Flop 328 \r\n\r\n 7.10 SET-RESET NAND Gate Flip-Flops Using a PLD 328 \r\n\r\n 7.11 Troubleshooting a Digital Circuit 333 \r\n\r\n Digital Application 335 \r\n\r\n Summary 336 \r\n\r\n Questions and Problems 337 \r\n\r\n Lab 7A Flip-Flops 339 \r\n\r\n Lab 7B Flip-Flops 340 \r\n\r\n 8 MASTER-SLAVE O AND dK FLIP-FLOPS 341 \r\n\r\n 8.1 Toggling a Master-Slave D Flip-Flop 343 \r\n\r\n 8.2 The JK Flip-Flop 344 \r\n\r\n 8.3 The Nonoverlapping Clock 347 \r\n\r\n 8.4 The Shift Counter 349 \r\n\r\n 8.5 Typical JK Flip-Flop ICS 352 \r\n\r\n 8.6 Making a Nonoverlapping Clock 353 \r\n\r\n 8.7 Trouble Shooting JK Flip-Flops 358 \r\n\r\n Digital Application 361 \r\n\r\n Summary 362 \r\n\r\n Questions and Problems 362 \r\n\r\n Lab 8A Shift Counter and Delayed Clock 365 \r\n\r\n Lab 8B JK Flip-Flops 368 \r\n\r\n 9 SHIFT REGISTERS 369 \r\n\r\n 9.1 Shift Register Constructed from JK Flip-Flops 371 \r\n\r\n 9.2 Parallel and Serial Data 372 \r\n\r\n 9.3 Parallel-In Serial-Out 373 \r\n\r\n 9.4 Serial Data Transmission Formats 375 \r\n\r\n 9.5 IC Shift Registers 379 \r\n\r\n 9.6 Serial Data Standards 382 \r\n\r\n 9.7 The ASCII Code 386 \r\n\r\n 9.8 Making an 8-Bit Shift Register with an Asynchronous Clear from the GAL 16V8B Programmable Logic Device 388 \r\n\r\n 9.9 Troubleshooting an RS-232C System 388 \r\n\r\n Digital Application 392 \r\n\r\n Summary 393 \r\n\r\n Questions and Problems 393 \r\n\r\n Lab 9A Shift Registers 395 \r\n\r\n Lab 9B Shift Registers 403 \r\n\r\n 10 COUNTERS 405 \r\n\r\n 10.1 The Ripple Counter 407 \r\n\r\n 10.2 The Decode-and-Clear Method of Making a Divide-By-NRipple Counter 408 \r\n\r\n 10.3 The Divide-By-N Synchronous Counter 410 \r\n\r\n 10.4 Presettable Counters 414 \r\n\r\n 10.5 The Up-Down Counter 416 \r\n\r\n 10.6 Typical MSI Counter ICs 419 \r\n\r\n 10.7 The Divide-By-N 1/2 Counter 425 \r\n\r\n 10.8 Making a Divide-by-16 Synchronous Counter 426 \r\n\r\n 10-9 Troubleshooting Counters 427 \r\n\r\n Digital Application 430 \r\n\r\n Summary 431 \r\n\r\n Questions and Problems 432 \r\n\r\n Lab 10A Counters 434 \r\n\r\n Lab 10B Counters 437 \r\n\r\n 11 SCHMITT-TRIGGER INPUTS AND CLOCKS 439 \r\n\r\n 11.1 The Schmitt-Trigger Input 441 \r\n\r\n 11.2 Using a Schmitt Trigger to Square Up an Irregular Wave 441 \r\n\r\n 11.3 A Schmitt-Trigger Clock 442 \r\n\r\n 11.4 The 555 Timer Used as a Clock 445 \r\n\r\n 11.5 Crystal Oscillators 451 \r\n\r\n 11.6 Troubleshooting Clock Circuits 452 \r\n\r\n Digital Application 454 \r\n\r\n Summary 455 \r\n\r\n Questions and Problems 456 \r\n\r\n Lab 1 lA Schmitt Triggers and Clocks 459 \r\n\r\n Lab llB Clocks 461 \r\n\r\n 12 ONE-SHOTS 463 \r\n\r\n 12.1 A One-Shot Debounce Switch 465 \r\n\r\n I2.2 The Pulse Stretcher 465 \r\n\r\n 12.3 The Retriggerable One-Shot 467 \r\n\r\n 12.4 The Nonretriggerable One-Shot 469 \r\n\r\n 12.5 The 555 as a One-Shot 470 \r\n\r\n 12.6 The 74121 and 741S122 471 \r\n\r\n 12.7 The Data Separator 473 \r\n\r\n 12.8 Troubleshooting One-Shots 475 \r\n\r\n Digital Application 477 \r\n\r\n Summary 478 \r\n\r\n Questions and Problems 478 \r\n\r\n Lab 12A One-Shots 481 \r\n\r\n Lab 12B One-Shots 483 \r\n\r\n 13 DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL \r\n\r\n CONVERSIONS 485 \r\n\r\n 13.1 Resistor Networks- for Digital-to-Analog Conversion 487 \r\n\r\n 13.2 The TTL Digital-to-Analog Converter 491 \r\n\r\n 13.3 Analog-to-Digital Conversion Using Voltage Comparators 494 \r\n\r\n 13.4 The Count-Up and Compare Analog-to-Digital Converter 496 \r\n\r\n 13.5 The Successive Approximation Analog-to-Digital Converter 498 \r\n\r\n 13.6 The DAC0830 Digital-to-Analog Converter Integrated Circuit 502 \r\n\r\n 13.7 Making the Logic for a 3-Bit Voltage Comparator Analog-to-Digital Converter 505 \r\n\r\n 13.8 Troubleshooting Digital-to-Analog Converters 506 \r\n\r\n Digital Application 509 \r\n\r\n Summary 511 \r\n\r\n Questions and Problems 511 \r\n\r\n Lab 14A Digital-to-Analog and Analog-to-Digital 513 \r\n\r\n Lab 14B Analog-to-Digital Converters 515 \r\n\r\n 14 DECODERS, MULTIPLEXERS, DEMULTIPLEXERS, AND DISPLAYS 517 \r\n\r\n 14.1 Decoders 519 \r\n\r\n 14.2 Demultiplexers 521 \r\n\r\n 14.3 Multiplexers 522 \r\n\r\n 14.4 Using a Multiplexer to Reproduce a Desired Truth Table 522 \r\n\r\n 14.5 Multiplexer and Demultiplexer ICs 525 \r\n\r\n 14.6 The 8-Trace Oscilloscope Multiplexer 528 \r\n\r\n 14.7 The Light-Emitting Diode 530 \r\n\r\n 14.8 The Seven-Segment Display 532 \r\n\r\n 14.9 The Liquid Crystal Display 536 \r\n\r\n 14.10 Making a 3-to-8 Decoder from the GAL 16V8B Programmable Logic Device 539 \r\n\r\n 14.11 Troubleshooting Decoders 543 \r\n\r\n Digital Application 545 \r\n\r\n Summary 546 \r\n\r\n Questions and Problems 547 \r\n\r\n Lab 14a Multiplexers, LEDs, and Seven-Segment Displays 549 \r\n\r\n Lab 14B LEDs 553 \r\n\r\n 15 TRI-STATE GATES AND INTERFACING TO HIGH CURRENT 555 \r\n\r\n 15.1 Tri-State Gates 557 \r\n\r\n 15.2 Tri-State Inverters and Buffers 559 \r\n\r\n 15.3 Computer Buses and the Tri-State Gate 562 \r\n\r\n 15.4 Buffering to High Current and High Voltage 564 \r\n\r\n 15.5 Multiplexing Seven-Segment LED Displays 567 \r\n\r\n 15.6 Isolating One Circuit from Another with Optocouplers 569 \r\n\r\n 15.7 Insulated Gate Bipolar Transistor (IGBT) 570 \r\n\r\n 15.8 Troubleshooting High-Current Digital Circuits 572 \r\n\r\n Digital Application 573 \r\n\r\n Summary 574 \r\n\r\n Questions and Problems 575 \r\n\r\n Lab 15A Tri-State Gates 577 \r\n\r\n Lab 15B High-Current Interface 578 \r\n\r\n 16 MEMORIES AND INTRODUCTION TO MICROCOMPUTERS 579 \r\n\r\n 16.1 The Microcomputer and Its Parts 581 \r\n\r\n 16.2 The Central Processing Unit 581 \r\n\r\n 16.3 Computer Memory 584 \r\n\r\n 16.4 ROM 585 \r\n\r\n 16.5 PROM 586 \r\n\r\n 16.6 EPROM 586 \r\n\r\n 16.7 EEPROM 591 \r\n\r\n 16.8 Static RAM 592 \r\n\r\n 16.9 Dynamic RAM 593 \r\n\r\n 16.10 The Input/Output of the Computer 597 \r\n\r\n 16.11 The Program , 600 \r\n\r\n 16.12 The Microcontroller 602 \r\n\r\n Digital Application 604 \r\n\r\n Summary 606 \r\n\r\n Questions and Problems 606 \r\n\r\n Lab 16 RAM 608 \r\n\r\n Appendixes 611 \r\n\r\n A Lab Trainer Plans 613 \r\n\r\n B Equipment Needed 617 \r\n\r\n C Pinouts 619 \r\n\r\n D NAND Gates, MOS, and CMOS 627 \r\n\r\n Glossary 633 \r\n\r\n Answers to Self-Check and Odd-Numbered Questions and Problems 643 \r\n\r\n Index 717 \r\n
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Digital Electronics 4th ed是一本入门性教科书, 不论是从应用还是从自学方面来看, 对初学者都是

很有帮助的教材, 适用于计算机. 电子信息与自动化类专业本科生使用. 本书在写作风格上由浅人深, 注意从应用的角度组织全书的教学内容, 只要求学生具有直流和交流电路(DC／AC)的知识. 本书的前3版已经以不同方式与计算机课程教学配合, 一般在第一学期学习DC／AC电路, 第二学期开设本课, 也可在第一学期与DC／AC电路同步开课, 或者将数字电子学和计算机课合在一起, 分成微机原理(I). 微机原理(II)作为微机硬件电路在第二. 第三两个学期使用. 本书不涉及晶体管和门电路的内部结构, 非常适合学生自学.

本书在第4版的编写上突出了以下几个特点：更大程度上强调的是开发技能方面的训练, 在每章都增加了技能训练内容, 包括在实际应用中碰到的实际问题的处理原则. 其次, 每一章都增加了新的EWB实验, 这些实验都是在电路中嵌入了故障的基础上, 训练学生用EWB分析和解决问题, 教给他们解决问题的原理. 思想和方法, 以及熟练地掌握EWB工具软件和开发技巧. 第三是把可编程逻辑器件(PLD)的内容也融合到各章内容之中, 以便使PLD内部结构的学习循序渐进, 以讨论和练习的方式学习. 每章都有PLD应用的问题. 另外, 每一章都增加了数字电路在工业设计方面的应用. 因此, 本书可供学习数字电子技术参考.

陈文楷

北京工业大学

2003年4月

Digital Electronics, Fourth Edition, is a streamlined, no-nonsense text that is idealfor the community college, Associate of Science degree student who needs a solid,introductory background in digital electronics. No previous knowledge in digital electronics is necessary, although a good working knowledge of dc circuits helps the student feel more comfortable with the concepts of voltage, current, and resistance.Students who complete this course are well prepared for the hardware encountered in a course in microprocessors.

Text Organization

This book is organized into sixteen chapters, one for each week of a full semester.Each chapter ends with laboratory exercises that closely correlate with the chaptermaterial. It is in these labs that the theory comes alive and practical hands-on skills are learned; a balance is struck between theory and practice. The fourth edition is organized as follows:

Number Systems

Binary, hexadecimal, and binary-coded decimal number systems are covered in Chapter 1, along with binary addition.Basic GatesBasic gates and exclusive-Org are covered in Chapters 2 through 4. Symbols, inverted-logic symbols, Boolean expressions, truth tables, enable/inhibit and gate expansion are stressed. Shift-counter and delayed-clock waveforms are used to introduce waveform analysis. Boolean algebra and Karnaugh map methods are used to implement given truth tables. Exclusive-OR gates are used as parity generators and parity checkers and as magnitude comparators. Adders

1's and 2's complement method of subtraction is introduced in Chapter 5, along with binary-coded-decimal addition, and signed 2's complement numbers. 1 's complement and 2's complement adder/subtractor circuits and binary-coded-decimal adder circuits are created by using the basic gates in conjunction with 4-bit full adders. Specifications

Totem-pole and open-collector outputs are contrasted in Chapter 6. TTL and CMOS subfamily characteristics and parameters are contrasted. Emitter-coupled logic is introduced.

Flip-Flops

A progression of flip-flops is studied in Chapters 7 and 8, beginning with crossed NAND and progressing through gated, transparent, data, master-slave, and JK flip-flops. JK flip-flops and gates are used to create shift-counter and delayed-clock wave forms.

Digital Communications

Integrated circuit serial and parallel shift registers are presented in Chapter 9. The RS-232 standard and ASCII code are studied and a serial receiver is created from flip-flops and gates. In a "human-relations" lab exercise, four students work as a team to create a serial receiver from flip-flops and gates and shift register integrated circuits. The system includes shift-counter and delayed-clock circuits studied in Chapter 8. The lab is complete when each member of the group is able to receive and decode the RS-232 ASCII signals from a computer.

Timing Circuits

Decode-and-clear and synchronous counters are presented in Chapter 10. Both integrated circuit counters and counters created from flip-flops and gates are studied. The student learns to design and create synchronous counters that count in any sequence.

Schmitt-trigger gates are introduced in Chapter 11. Schmitt-trigger gates, 555 timers, CMOS gates, and crystals are used to create a variety of clock circuits.

Triggerable and non-retriggerable one-shot circuits are covered in Chapter 12. Both integrated circuit one-shots and one-shots created from Schmitt-trigger gates and 555 timers are studied.

Interface Circuits

Chapter 13 begins a sequence of topics concerned with interfacing digital control circuits with the external world.

Digital-to-analog and analog-to-digital converters are covered in Chapter 13. Count-up and compare, flash converters, and successive approximation converters are created with flip-flops, gates, and voltage comparators. The successive approximation circuit begins with shift-counter and delayed-clock circuits developed in Chapter 8. Integrated circuit converters are presented.

In Chapter 14, the concept of decoding is expanded into multiplexers and demultiplexers. Integrated circuit multiplexers and demultiplexers are presented. LED and liquid crystal seven-segment displays are introduced.

Chapter 15 introduces tri-state gates and bus drivers. Examples are given of interfacing control circuits to high-current, high-voltage devices. Introduction to Microcomputers Chapter 16 is a bridge from digital electronics into microcomputers. The basic parts of a microcomputer are discussed. Memory-integrated circuits are presented. Appendixes

Appendix A contains plans and schematics for construction of a lab trainer. Appendix B contains a list of materials needed to construct the lab circuits. Pinouts for the integrated circuits used in the lab exercises are shown in Appendix C. Although handy,these pinouts are no substitute for good TTL and CMOS specification manuals (databooks). It is recommended that data books be obtained from one or more of the major integrated circuit manufacturers.

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